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Thin Films Module Development Engineer

Intel · Hillsboro, OR1mo agoverified 21 h ago
$134k – $189k

PhD-level Process Engineering roles on Crosslinked list a median of $129k (10 that show pay).

Develop and optimize thin film metal deposition processes (ALD, CVD, PVD, ECD) for advanced semiconductor nodes

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Worth knowing

Why it is interesting. Hands-on with first-of-kind deposition tools and novel metals screening at Intel Foundry's advanced node TD org.

Might not be for you. Requires on-site presence plus 24/7 manufacturing support with on-call rotation; PhD-level entry role.

Mostly at the benchDeep specialistFast-paced PhD-friendlyFirst industry role

Adjacent materials rolethin film metal deposition process development across ALD, CVD, PVD, electrochemical deposition; materials characterization and metrology

H-1B filings

Intel filed 974 H-1B labor applications for scientist and engineer roles from Jan to Dec 2025.

Most common titles: Process Engineer, Engineering Manager, Quality Reliability Engineer. Median filed pay: $124K a year.

From U.S. Department of Labor disclosure data. A filing is a record of past hiring, not a promise about this role, so confirm sponsorship with the employer. Titles and filed pay ·Every employer's filings

Seniority
Entry level
Work
On-site
Type
Full-time
Degree
PhD
Experience
1+ yrs
Industry
Semiconductor
Role
Process Engineering
Materials
thin film metalshigh-k/metal gate materialsCu interconnect barrier/linercontact metallization
Benefits
stock bonuses

Role details

Job Details: Job Description: Intel Foundry is seeking highly motivated Thin Films Metals Module Development Engineers to join the Technology Development (TD) organization to accelerate development of advanced process development for applications in high-k/metal gate, contact, and interconnect. In this role you will be responsible for delivering metals process definition, development, and optimization in metal deposition modules.

Core Responsibilities: Primary ownership of thin film metal deposition process development across ALD, CVD, PVD, electrochemical deposition, and related process platforms Design, implement, and optimize processes to meet specifications for materials, device performance, yield, and process control Design, execute, and analyze experiments to meet integrated device requirements and support rapid yield improvement Apply expert knowledge of equipment operating principles, materials characterization and metrology, and device characteristics to accelerate technology development learning cycles Support novel material and process screening and evaluation, equipment selection, on-time install/qualification of first-of-kind equipment, and design for manufacturability Partner with cross-functional teams including process integration, device engineering, metrology, yield, manufacturing, and equipment suppliers Contribute to process pathfinding efforts for next-generation semiconductor technologies through evaluation of novel materials, hardware assessment, process screening, integration development, and silicon validation Qualifications:

Minimum qualifications

are required to be initially considered for this position.

Preferred qualifications

are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications

PhD in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, Chemistry, or a closely related STEM field With at least 1+ years of experience in: Working knowledge of one or more thin film deposition technologies such as ALD, CVD, PVD, sputtering, evaporation, electrochemical deposition, or related vacuum process technologies Demonstrated ability to analyze process data using statistical methods, structured troubleshooting, and robust experimental design Preferred Qualifications: Experience in thin film metal deposition process development for high-k/metal gate stack, contact metallization, or Cu interconnect barrier/liner/plating Experience with materials characterization and metrology methods such as XRF, XPS, XRD, SEM, TEM, ellipsometry, e-test, defect inspection, reliability, and related techniques Experience with MOSFET / FinFET / GAA / CFET device characteristics, electrical characterization techniques, and semiconductor device fundamentals Proficient with data analysis software including JMP, Excel, Python, R, SQL Strong communication and collaboration skills with demonstrated ability to solve challenging and ambiguous technical problems in a fast-moving and dynamic team environment Experience using AI-assisted engineering tools to improve technical productivity while maintaining critical independent engineering judgement Strong written and verbal communication skills with ability to document decisions, summarize technical data, and align cross-functional stakeholders Availability to work on site and support 24/7 manufacturing operations with on-call rotation For information on Intel’s immigration sponsorship guidelines, please see Intel U.S.

Immigration Sponsorship Information Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. • Job posting details (such as work model, location or time type) are subject to change. • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.

If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Common questions

What is the salary for the Thin Films Module Development Engineer role at Intel?

The listed annual base salary range is $134K–$189K. This figure is taken from the posting itself.

Does Intel sponsor H-1B visas?

Intel has filed H-1B petitions with the US Department of Labor in past years, but this specific posting does not explicitly mention sponsorship for the Thin Films Module Development Engineer role. Confirm with the employer before applying if visa support is required.

Where is the Thin Films Module Development Engineer role at Intel based?

This role is based in Hillsboro, OR.

What degree is required for the Thin Films Module Development Engineer role at Intel?

This role requires a PhD.

How many years of experience does this Thin Films Module Development Engineer role require?

The posting calls for at least 1 years of relevant experience.

What polymers or materials does this Thin Films Module Development Engineer role work with?

thin film metals, high-k/metal gate materials, Cu interconnect barrier/liner.

What techniques or methods are required for this Thin Films Module Development Engineer role?

statistical process data analysis, experimental design (DOE).