Transistor Reliability and Quality Engineer
BS-level Quality / Testing roles on Crosslinked list a median of $109k (164 that show pay).
Characterize transistor reliability (HCI, NBTI, TDDB) and build physics-based wear-out models for next-gen process nodes
Worth knowing
Why it is interesting. Cutting-edge transistor reliability physics at Intel's technology development team, with SPICE-compatible model ownership.
Might not be for you. Device-physics and reliability engineering role — not polymer or materials formulation work; heavy statistical modeling.
The materials angleTransistor reliability characterization: HCI, NBTI/PBTI, TDDB; semiconductor device fabrication, process characterization
H-1B filings
Intel filed 974 H-1B labor applications for scientist and engineer roles from Jan to Dec 2025.
Most common titles: Process Engineer, Engineering Manager, Quality Reliability Engineer. Median filed pay: $124K a year.
From U.S. Department of Labor disclosure data. A filing is a record of past hiring, not a promise about this role, so confirm sponsorship with the employer. Titles and filed pay ·Every employer's filings
- Seniority
- Mid-level
- Work
- On-site
- Type
- Full-time
- Degree
- BS
- Experience
- 2+ yrs
- Industry
- Semiconductor
- Role
- Quality / Testing
Role details
Job Details: Job Description: Intel is seeking a highly motivated and talented Transistor Quality and Reliability Engineer to join our Technology Development Quality and Reliability Engineering team. In this role, you will work at the cutting edge of transistor technology development, ensuring the highest levels of quality and reliability for Intel's next-generation process technologies. You will collaborate closely with cross-functional teams including Process Integration, Device Engineering, Yield Engineering, and Product teams to drive quality and reliability excellence from early technology development through technology qualification and high-volume manufacturing readiness.
Responsibilities - Drive transistor reliability characterization and certification activities including but not limited to: Hot Carrier Injection (HCI), Bias Temperature Instability (NBTI/PBTI), Time Dependent Dielectric Breakdown (TDDB) - Collaborate with process integration and device engineering teams to develop a high volume manufacturable technology that meets yield, performance and reliability requirements. • Develop FMEA for novel transistor structures and materials • Define and implement reliability monitors and early warning indicators for technologies • Drive continuous improvement in reliability methodologies, test structures, and characterization techniques - Develop physics-based and empirical reliability models for transistor wear-out and degradation mechanisms including: • Lifetime prediction • Statistical distribution modeling (Weibull, lognormal) • SPICE-compatible reliability model development for circuit design enablement - Design reliability test structures and test-chip layouts to enable: • Systematic reliability characterization • Early detection of reliability and quality risks • Collaboration with layout and design teams to tape-in test-structures and influence design for reliability for partner organizations - Develop and improve automation framework for data analysis to enable: • Systematic reliability characterization from a high volume of data across multi variable process modulators Qualifications:
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field with 6+ years of industry experience OR a Master's degree in the above fields with 4+ years of experience OR a Ph.D. with 2+ years of experience. Experience to be considered: - Hands-on experience in semiconductor device fabrication, process characterization, and experimental design. - Proficiency in statistical analysis and data interpretation using tools such as JMP, R, SAS, or Python. - Strong technical background in semiconductor device physics and reliability mechanisms. - Knowledge of process integration and technology development methodologies.
Preferred Qualifications
- Experience in semiconductor reliability engineering and technology qualification frameworks. - Familiarity with advanced CMOS process integration and transistor reliability mechanisms (e.g., HTOL, ELFR, TDDB). - Proficiency in statistical quality systems, process capability analysis, and defect reliability modeling. - Background in data analytics, machine learning, and AI-assisted engineering workflows. - Expertise in semiconductor failure analysis, fabrication, and physical characterization techniques. - Experience with automation and scripting tools such as SQL and Python. We're looking for exceptional candidates eager to make a lasting impact on Intel's innovation journey.
If you're ready to advance groundbreaking technologies and thrive in a collaborative, dynamic environment, we encourage you to take the next step and apply today.
Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $155,520.00-219,550.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role This role will require an on-site presence. • Job posting details (such as work model, location or time type) are subject to change. • ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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