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Silicon photonics and heterogenous integration R&D engineer

Coherent Corp. · Santa Clara, CA3w agoverified 8 h ago

PhD-level R&D / Research roles on Crosslinked list a median of $131k (116 that show pay). This posting does not list pay.

Develop silicon photonics and heterogeneously integrated photonic devices, modeling and validating prototypes

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Worth knowing

Why it is interesting. Shape early-stage CPO and optical I/O architectures, from wafer bonding to tapeout handoff, at a major photonics player

Might not be for you. Requires 7+ years and hands-on SiP fab experience; photonics-first, not polymer formulation work

Bench and deskTechnical lead PhD-friendlySenior hires only Works with universitiesRoom for your own research

Adjacent materials roleheterogeneous integration of non-silicon materials on silicon, including wafer bonding, die bonding, transfer printing, direct bonding, adhesive bonding, thin-film transfer

H-1B filings

Coherent Corp. filed 10 H-1B labor applications for scientist and engineer roles from Jan to Dec 2025.

Most common titles: Sr. Optical Test Engineer, Director, Product Management, Manager, System and Supplier Quality. Median filed pay: $120K a year.

From U.S. Department of Labor disclosure data. A filing is a record of past hiring, not a promise about this role, so confirm sponsorship with the employer. Titles and filed pay ·Every employer's filings

Seniority
Senior
Work
On-site
Type
Full-time
Degree
PhD
Experience
7+ yrs
Industry
Semiconductor
Role
R&D / Research
Materials
silicon photonics5 rolesnon-silicon thin films on siliconadhesives for wafer/die bonding
Techniques
device verificationmetrology data reviewwafer bondingfiber attach

Role details

Primary Duties & Responsibilities

  • Develop silicon photonics and heterogeneously integrated device and circuit concepts for datacom, optical I/O, and related platforms.
  • Model optical, electrical, thermal, and link-level behavior to guide design choices before prototype builds.
  • Define prototype verification objectives and use early trial results to refine designs.
  • Apply process-integration awareness to keep designs compatible with fabrication, test, and metrology constraints.
  • Evaluate heterogeneous integration options when they may improve silicon photonics performance or functionality.

Key Responsibilities

  • Advanced Technical Assessment and Incubation
  • Shape early-stage concepts, feasibility objectives, risk-reduction plans, and prototype approaches for CTO Office topics, including possible architectures such as CPO and optical I/O.
  • Lead technical evaluations, modeling, design reviews, and trade-off studies with internal or external contributors.
  • Develop recommendations on performance, manufacturability, integration path, scalability, reliability, and transition readiness.
  • Roadmap Input and Technology Direction
  • Contribute technical input to roadmap discussions in optical interconnect, CPO / optical I/O, AI/HPC infrastructure, silicon photonics, detector technologies, and related platforms.
  • Translate emerging technology options into milestones, risks, decision points, and recommended next steps
  • Cross-Functional Execution and Communication
  • Coordinate work across design, PDK, fabrication, process-integration, packaging, reliability, test, and external partner teams, including tapeout readiness and handoff to fabrication partners.
  • Prepare concise design reviews, prototype summaries, and recommendations for senior technical, product, and business stakeholders.
  • Support partner, supplier, university, and ecosystem discussions when technical representation is needed.

Education & Experience

  • Ph.D. in Electrical Engineering, Applied Physics, Photonics, Materials Science, or related field.
  • >7 years of experience in silicon photonics design, integrated photonics R&D, SiP fabrication-aware design, prototype development, device verification, or related semiconductor photonics work.
  • Hands-on SiP fabrication experience or close collaboration with SiP fabrication teams is required, with sufficient process understanding to design realistic prototype trials and interpret results.
  • The role benefits from experience with heterogeneous integration of non-silicon materials on silicon, including wafer bonding, die bonding, transfer printing, direct bonding, adhesive bonding, or thin-film transfer.
  • Experience connecting design choices to optical, electrical, thermal, mechanical, reliability, process-integration, and packaging outcomes for photonic or optoelectronic devices.
  • Experience with simulation, data analysis, DOE, documentation, and R&D decision support using Python, Lumerical, COMSOL, JMP, Excel, or equivalent.
  • Packaging experience is a plus, including co-packaged optics, optical coupling, fiber attach, PIC / EIC integration, OSAT engagement, or prototype assembly.

Skills

  • Strong foundation in silicon photonics design, device physics, test vehicles, materials interfaces, PDK-based design, and process-integration constraints.
  • Familiarity with PDKs from multiple fabs, silicon photonics tapeout flows, and layout reviews is valuable.
  • Structured problem-solving ability and comfort defining technical direction from trade-offs, incomplete data, and early prototype results.
  • Experience with silicon photonics tapeouts is a valuable strength for this role.
  • Collaborative style and ability to influence across design, process integration, packaging, reliability, business groups, suppliers, and external partners.
  • Clear written and verbal communication with senior technical, product, manufacturing, and business audiences.

Working Conditions

  • In-person position based in Santa Clara, California.
  • Combination of design analysis, prototype planning, R&D verification, cross-functional collaboration, and external ecosystem engagement.

Physical Requirements

  • Ability to work in laboratory or cleanroom-adjacent environments, follow PPE requirements, handle wafers or samples when needed, and review process, metrology, and test data.

Safety Requirements

All employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.

Quality and Environmental Responsibilities

Culture Commitment

Ensure adherence to company’s values (ICARE) in all aspects of your position at Coherent Corp.:

I ntegrity – Create an Environment of Trust

C ollaboration – Innovate Through the Sharing of Ideas

A ccountability – Own the Process and the Outcome

R espect – Recognize the Value in Everyone

E nthusiasm – Find a Sense of Purpose in Work

*Coherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.*

*If you need assistance or an accommodation due to a disability, you may contact us at* *talentacquisition@coherent.com* *.* Primary Duties & Responsibilities

  • Develop silicon photonics and heterogeneously integrated device and circuit concepts for datacom, optical I/O, and related platforms.
  • Model optical, electrical, thermal, and link-level behavior to guide design choices before prototype builds.
  • Define prototype verification objectives and use early trial results to refine designs.
  • Apply process-integration awareness to keep designs compatible with fabrication, test, and metrology constraints.
  • Evaluate heterogeneous integration options when they may improve silicon photonics performance or functionality.

Key Responsibilities

  • Advanced Technical Assessment and Incubation
  • Shape early-stage concepts, feasibility objectives, risk-reduction plans, and prototype approaches for CTO Office topics, including possible architectures such as CPO and optical I/O.
  • Lead technical evaluations, modeling, design reviews, and trade-off studies with internal or external contributors.
  • Develop recommendations on performance, manufacturability, integration path, scalability, reliability, and transition readiness.
  • Roadmap Input and Technology Direction
  • Contribute technical input to roadmap discussions in optical interconnect, CPO / optical I/O, AI/HPC infrastructure, silicon photonics, detector technologies, and related platforms.
  • Translate emerging technology options into milestones, risks, decision points, and recommended next steps
  • Cross-Functional Execution and Communication
  • Coordinate work across design, PDK, fabrication, process-integration, packaging, reliability, test, and external partner teams, including tapeout readiness and handoff to fabrication partners.
  • Prepare concise design reviews, prototype summaries, and recommendations for senior technical, product, and business stakeholders.
  • Support partner, supplier, university, and ecosystem discussions when technical representation is needed.

Education & Experience

  • Ph.D. in Electrical Engineering, Applied Physics, Photonics, Materials Science, or related field.
  • >7 years of experience in silicon photonics design, integrated photonics R&D, SiP fabrication-aware design, prototype development, device verification, or related semiconductor photonics work.
  • Hands-on SiP fabrication experience or close collaboration with SiP fabrication teams is required, with sufficient process understanding to design realistic prototype trials and interpret results.
  • The role benefits from experience with heterogeneous integration of non-silicon materials on silicon, including wafer bonding, die bonding, transfer printing, direct bonding, adhesive bonding, or thin-film transfer.
  • Experience connecting design choices to optical, electrical, thermal, mechanical, reliability, process-integration, and packaging outcomes for photonic or optoelectronic devices.
  • Experience with simulation, data analysis, DOE, documentation, and R&D decision support using Python, Lumerical, COMSOL, JMP, Excel, or equivalent.
  • Packaging experience is a plus, including co-packaged optics, optical coupling, fiber attach, PIC / EIC integration, OSAT engagement, or prototype assembly.

Skills

  • Strong foundation in silicon photonics design, device physics, test vehicles, materials interfaces, PDK-based design, and process-integration constraints.
  • Familiarity with PDKs from multiple fabs, silicon photonics tapeout flows, and layout reviews is valuable.
  • Structured problem-solving ability and comfort defining technical direction from trade-offs, incomplete data, and early prototype results.
  • Experience with silicon photonics tapeouts is a valuable strength for this role.
  • Collaborative style and ability to influence across design, process integration, packaging, reliability, business groups, suppliers, and external partners.
  • Clear written and verbal communication with senior technical, product, manufacturing, and business audiences.

Working Conditions

  • In-person position based in Santa Clara, California.
  • Combination of design analysis, prototype planning, R&D verification, cross-functional collaboration, and external ecosystem engagement.

Physical Requirements

  • Ability to work in laboratory or cleanroom-adjacent environments, follow PPE requirements, handle wafers or samples when needed, and review process, metrology, and test data.

Safety Requirements

All employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.

Quality and Environmental Responsibilities

Culture Commitment

Ensure adherence to company’s values (ICARE) in all aspects of your position at Coherent Corp.:

I ntegrity – Create an Environment of Trust

C ollaboration – Innovate Through the Sharing of Ideas

A ccountability – Own the Process and the Outcome

R espect – Recognize the Value in Everyone

E nthusiasm – Find a Sense of Purpose in Work

*Coherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.*

*If you need assistance or an accommodation due to a disability, you may contact us at* *talentacquisition@coherent.com* *.*

Related roles

Common questions

Does Coherent Corp. sponsor H-1B visas?

Coherent Corp. has filed H-1B petitions with the US Department of Labor in past years, but this specific posting does not explicitly mention sponsorship for the Silicon photonics and heterogenous integration R&D engineer role. Confirm with the employer before applying if visa support is required.

Where is the Silicon photonics and heterogenous integration R&D engineer role at Coherent Corp. based?

This role is based in Santa Clara, CA.

What degree is required for the Silicon photonics and heterogenous integration R&D engineer role at Coherent Corp.?

This role requires a PhD.

How many years of experience does this Silicon photonics and heterogenous integration R&D engineer role require?

The posting calls for at least 7 years of relevant experience.

What polymers or materials does this Silicon photonics and heterogenous integration R&D engineer role work with?

silicon photonics, non-silicon thin films on silicon.

What techniques or methods are required for this Silicon photonics and heterogenous integration R&D engineer role?

device verification, metrology data review.